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Proof of Concept

BlueField-2 / ConnectX-6 Dx

Linux mlx5 โ†’ Automotive Zephyr RTOS

Converting NVIDIA's data-center networking technology into an ISO 26262-compliant embedded Ethernet driver

Vendor 0x15B3 Device 0x101D Zephyr RTOS MISRA C:2023 ISO 26262 Clean-Room

Swipe or use arrows to navigate โ†’

What Is BlueField-2?

๐Ÿ”Œ ConnectX-6 Dx NIC

NVIDIA's high-performance network controller (mlx5 family). In Linux, it's driven by the mlx5_core loadable kernel module โ€” a ~200,000-line GPL driver.

๐Ÿง  Embedded ARM Compute

BlueField-2 pairs the ConnectX-6 Dx with 8ร— ARM Cortex-A72 cores. This mirrors automotive: high-performance NIC + safety-certified RTOS.

The Transformation

Linux mlx5

~200K lines, GPL

Data center

โ†’

Clean-Room

~5,800 lines

Apache-2.0

โ†’

Zephyr RTOS

Automotive-grade

ISO 26262

The Conversion Journey

Why Clean-Room? (Not a Port)

โŒ Porting from Linux

  • GPL license contamination
  • Inherits non-MISRA patterns
  • Dynamic allocation everywhere
  • Complex kernel API dependencies
  • Impossible to certify ISO 26262

โœ… Clean-Room Rewrite

  • Apache-2.0 โ€” automotive-friendly
  • MISRA C:2023 from line 1
  • 100% static allocation, DMA-safe
  • Zephyr-native APIs only
  • Designed for ISO 26262

Key Design Decisions

๐Ÿ“ Static Everything

All buffers and queues statically allocated. Zero malloc/free. Sizes via Kconfig.

๐Ÿ”ข No Bitfields

Hardware accessed via byte-level big-endian helpers. No compiler padding issues.

๐ŸŽฏ Single Return

Every function has one return point using goto cleanup pattern.

Driver Architecture

Module Dependency Graph

cx6_eth

Zephyr net_if

โ†

cx6_interrupt

MSI-X / k_work

โ†

cx6_queue

SQ/RQ/CQ/EQ

โ†

cx6_device

FW commands

โ†

cx6_pcie

BAR/MSI-X

Device State Machine

RESETโ†’ PCIE_READYโ†’ FW_READYโ†’ CMDIF_READYโ†’ HCA_ENABLEDโ†’ PAGES_GIVENโ†’ HCA_INITEDโ†’ RUNNING

TX / RX / Interrupt Paths

TX: net_pkt โ†’ cx6_eth_send() โ†’ linearise โ†’ cx6_sq_post_tx() โ†’ SQ doorbell โ†’ HW DMA
RX: HW DMA โ†’ CQE โ†’ cx6_cq_poll_rx() โ†’ net_pkt_rx_alloc() โ†’ net_recv_data()
IRQ: MSI-X โ†’ cx6_isr() โ†’ k_work_submit() โ†’ drain EQ/CQ โ†’ rearm doorbells

MISRA C:2023 โ€” Built In

No Dynamic Allocation

static cx6_cmd_slot_t cmd_slot_buf
    __attribute__((aligned(4096)));
static uint8_t fw_page_pool
    [FW_PAGES_MAX][4096]
    __attribute__((aligned(4096)));

No Bitfields for HW

static inline void cx6_put_be32(
    uint8_t *buf, uint32_t val) {
  buf[0] = (uint8_t)(val >> 24U);
  buf[1] = (uint8_t)(val >> 16U);
  buf[2] = (uint8_t)(val >>  8U);
  buf[3] = (uint8_t)(val);
}

Fixed-Width Types Only

int32_t cx6_pcie_init(
    struct cx6_dev *dev) {
  int32_t  ret     = 0;
  uint32_t pcie_id = 0U;
  /* No bare int, unsigned */
}

Single Return Point

int32_t func(args) {
  int32_t ret = 0;
  if (dev == NULL) {
    ret = -EINVAL;
    goto out;
  }
  /* ... */
out:
  return ret;
}

File Manifest

CategoryFilePurpose
BuildCMakeLists.txtZephyr app build
BuildKconfigTop-level Kconfig
Buildprj.confBase configuration
Drivercx6_regs.hRegister offsets & bitmasks
Drivercx6_cmd_if.hCommand opcodes & BE helpers
Drivercx6_desc.hWQE/CQE/EQE formats
Drivercx6_priv.hDevice struct & state machine
Drivercx6_pcie.c/hPCIe discovery, BAR, MSI-X
Drivercx6_device.c/hFW commands, HCA lifecycle
Drivercx6_queue.c/hDMA rings, WQE construction
Drivercx6_interrupt.c/hISR + k_work bottom-half
Drivercx6_eth.c/hZephyr Ethernet API
Testtests/unit/cx6/58 tests + stubs
Docsdocs/architecture.mdFull architecture doc

Done vs. Remaining

55% Complete

โœ… Completed

  • All 5 driver modules (~5,800 LOC)
  • Zephyr build (137/137 steps)
  • 58 unit tests passing
  • MISRA C:2023 patterns built-in
  • 15+ FW command opcodes
  • TX/RX with static buffers
  • DeviceTree binding + Kconfig

โŒ Not Yet Done

  • Hardware validation on real NIC
  • DMA / IOMMU integration
  • Multi-queue / RSS
  • Hardware offloads (TSO/LRO)
  • SR-IOV / VF support
  • Power management
  • ISO 26262 certification

๐Ÿšง What's Stopping Us?

1. NVIDIA PRM (NDA)

The ConnectX-6 Dx Programmer's Reference Manual is not publicly available. Exact command layouts, steering tables, and silicon errata require NDA access.

2. Hardware Platform

Requires a Zephyr-supported board with PCIe host capability and IOMMU/SMMU. Zephyr's PCIe host support is currently limited.

3. Certification Path

ISO 26262 needs formal safety concepts, HSI specs from NVIDIA, dependent failure analysis, and tool qualification.

How to Build & Test

๐Ÿ”จ Zephyr Build

export ZEPHYR_BASE=~/zephyrproject/zephyr
west build -b native_sim . \
  -- -DCONFIG_ETH_CX6_DX=y

๐Ÿงช Unit Tests (no Zephyr)

cd tests/unit/cx6
make
./cx6_unit_tests
make coverage

Project Statistics

~5,800
Lines of MISRA-Compliant C
14
Source & Header Files
58
Unit Tests Passing
137/137
Zephyr Build Steps
5
Driver Modules
15+
FW Command Opcodes

Languages

  • C11 โ€” MISRA C:2023 target
  • Kconfig โ€” Zephyr configuration
  • CMake 3.20+ โ€” Build system
  • YAML โ€” DeviceTree bindings

License

Apache-2.0

No GPL contamination โ€” clean-room implementation using only public hardware knowledge.

BlueField-2 / ConnectX-6 Dx Automotive Conversion POC โ€” March 2026