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Prepared by Daniel Liezrowice
Engineering Software Lab — AI SDLC Consultants
www.eswlab.com

Optical AI Networks

100× Faster Inference: A Comparative Analysis
🇨🇳 Peking University
vs
🇮🇱 Nvidia Israel / Mellanox
Published: July 2026  |  Source: National Science Review & Interesting Engineering
Daniel Liezrowice — Engineering Software Lab — www.eswlab.com

The Bottleneck Has Moved

AI performance is no longer limited by compute — it's limited by how chips communicate

GPU compute scales
with Moore's law end
🔗
Data movement between
chips is the new wall
💡
Optical interconnects
are the solution

"The interconnect, not the compute, is the bottleneck."
Both Peking University and Nvidia Israel have independently reached this conclusion —
but from very different angles and at very different scales.

GPU 1 MEM GPU 2 MEM GPU 3 MEM Copper ⚠ Copper ⚠ Optical Interconnect — Light replaces copper

On-Chip All-Optical Network

Published in National Science Review, July 2026

What They Built

  • An on-chip all-optical network connecting multiple computing chips — no electrical links between nodes
  • A 400 Gbps silicon photonic transceiver converting electrical ↔ optical signals
  • A custom 16×16 optical switch chip routing data between compute nodes
  • Aggregate switching bandwidth: 6.4 Tbps
  • Total insertion loss <5 dB — no external optical gain needed
  • Spectral response >100 nm (WDM-ready)

How It Works

CNN Layer 1 CNN Layer 2 CNN Layer 3 16×16 Optical Switch 6.4 Tbps 400G SiPh Transceiver E↔O Conv.
Lab Prototype   Co-design: Algorithm + Architecture + Interconnect

Architecture Deep Dive

Feature maps flow directly through light — no memory round-trips

400
Gbps Transceiver
Speed
6.4
Tbps Aggregate
Switching BW
16×16
Optical Switch
Matrix Size
<5
dB Total Loss
(no gain needed)

Inference Pipeline: Image Denoising CNN

Input
Image
CNN
Layer 1
Optical
Link
CNN
Layer 2
Optical
Link
CNN
Layer 3-5
Denoised
Output

Feature maps transmitted directly through optical network — no intermediate memory writes

Key innovation: The optical switch maintains error-free performance across multiple communication paths with a spectral response exceeding 100 nm, making it suitable for future bandwidth expansion through wavelength-division multiplexing (WDM). The design eliminates the need for DSP retimers or external optical amplification.

100× Faster, 1/9th the Compute

Compared against a commercial GPU running the same image-denoising task

100×
Faster Inference
vs. commercial GPU
1/9
Computational Resources
used vs. GPU

Performance Comparison

Commercial GPU
Optical System
100×
Commercial GPU
9 units
Optical System
~1 unit
↑ Inference Speed (higher = better) ↑ Compute Used (lower = better)

Researchers' Key Claim

"Specific objectives can be realised under limited computational resources when algorithms, processor micro-architectures and chip-level interconnections are co-designed."

From Yokneam to AI Factory

The $6.9B acquisition that became Nvidia's networking backbone

1999
Mellanox founded in Yokneam Illit, Israel by Eyal Waldman & team
2001
Shipped first InfiniBand product (InfiniBridge, 10 Gbit/s)
2013
Acquired Kotura (silicon photonics) & IPtronics (optical interconnect)
2019
Nvidia announces $6.9B acquisition; China's SAMR delays approval
2020
Acquisition closes (April). Mellanox brand retired. Yokneam → Nvidia networking HQ
2026
Networking revenue: $10.98B/quarter (263% YoY). $31B+ full year
$6.9B
Acquisition Price
(2019)
$31B+
Annual Networking
Revenue (FY2026)
2,800+
Employees at
Yokneam (2020)

Production-Grade Optical Networking

Shipping at hyperscale — adopted by Meta, Microsoft, Oracle, CoreWeave

Quantum-X InfiniBand Photonics

Ultra-low-latency scale-out fabric for AI training clusters. InfiniBand with RDMA.

200G SerDes CPO

Spectrum-X Ethernet Photonics

Ethernet scale-out for AI inference. 5× better power efficiency than pluggable.

409.6 Tb/s per switch

BlueField DPU (3/4)

Offloads networking, storage, security from host CPU/GPU. Line-rate processing.

400 Gb/s line-rate

Spectrum-XGS Ethernet

Scale-across: connects AI clusters across data centers and campuses.

1.9× NCCL improvement

NVLink

GPU-to-GPU scale-up within rack. Currently copper, optical roadmap in progress.

Revolutionized scale-up

Tower Semiconductor Partnership

Israeli foundry scaling 1.6T silicon photonics for Nvidia networking protocols.

$650M+ investment

Ayar Labs Collaboration

Chip-to-chip optical I/O for future AI architectures. $500M Series E (2026).

1000× bandwidth density

Co-Packaged Optics (CPO)

Moving optical engines onto the switch ASIC package

How CPO Works

Traditional: Pluggable Transceivers Switch PCB Module Long electrical path = high power Nvidia CPO: Co-Packaged Optics Switch Optical Engine Short path = 5× less power Built on TSMC COUPE + SoIC-X 3D hybrid bonding 5× Power Eff. 5× Uptime 1.3× Faster TTI

Ecosystem & Manufacturing

  • Tower Semiconductor (Migdal HaEmek, Israel): $650M+ in silicon photonics capacity expansion. 1.6T optical modules for Nvidia
  • TSMC COUPE platform: 3D hybrid bonding co-integrates electronic + photonic ICs
  • Ayar Labs: $500M Series E at $3.75B valuation for optical I/O chiplets
  • Full-stack co-design: GPU + NIC + Switch + Optics + CUDA + NCCL integrated as one platform
  • 1.6T modules began volume shipments in April 2026
  • 800G modules became widely available in 2025

Side-by-Side Analysis

Same conclusion, very different approaches and scales

Dimension 🇨🇳 Peking University 🇮🇱 Nvidia Israel / Mellanox
Maturity Lab prototype, single demo (CNN) Shipping at hyperscale; Meta, MS, Oracle
Scale 5 compute nodes, 6.4 Tbps Million-GPU factories, 409.6 Tb/s/switch
Optical Approach On-chip all-optical network; optical switch routes between nodes CPO on switch ASIC; optics replace pluggable transceivers
Problem Solved Inference bottleneck — eliminates memory round-trips Training + inference at DC scale — eliminates SerDes loss
Key Innovation Algorithm-architecture-interconnect co-design Full-stack co-design: GPU+NIC+Switch+Optics+Software
Bandwidth 400 Gbps transceiver, 6.4 Tbps switch 1.6T modules shipping, 409.6 Tb/s per switch
Power Efficiency 1/9th compute of a GPU for same task 5× better power efficiency vs. pluggable
Performance Claim >100× faster inference (one workload) 1.6× network perf vs. OTS Ethernet; deterministic latency
Revenue Academic research (no revenue) $10.98B/quarter networking revenue

Convergence & Divergence

Both sides reached the same conclusion — from opposite directions

Shared Convergence

  • Same diagnosis: The interconnect — not the compute — is the bottleneck in AI scaling
  • Same prescription: Light must replace copper for chip-to-chip communication
  • Same technology base: Both use silicon photonics transceivers and optical switching
  • Same philosophy: Co-design of algorithm, architecture, and interconnect is essential
  • Same goal: Reduce energy consumption while improving AI inference performance
  • Same trajectory: Both cite co-packaged optics as the path forward

Key Divergence

  • Peking University: Attacks inside the compute pipeline — optical switch connects individual processing elements, eliminating memory round-trips. Chip-level, inference-focused, workload-specific.
  • Nvidia Israel: Attacks at the data-center fabric level — CPO connects thousands of GPUs into a single logical machine. System-level, training+inference, workload-agnostic.
  • Scale gap: 5-node CNN demo vs. million-GPU production clusters
  • Integration depth: Standalone prototype vs. full stack (CUDA, NCCL, BlueField, NVLink, Spectrum-X, Quantum-X)
  • Generalization: Single workload (image denoising) vs. all AI workloads at hyperscale

Analogy: Peking University is roughly where Mellanox was circa 2002 — proving the concept exists. Nvidia Israel has already built the factory, the supply chain, and the customer base.

The Irony of Optical AI

China is simultaneously constraining and replicating Nvidia's networking dominance

🇨🇳 China's Position

SAMR Antitrust Probe (Dec 2024): China launched an antitrust investigation into Nvidia over Mellanox acquisition conditions. The deal was delayed over a year (2019–2020) by Chinese regulators.

US Export Curbs: China faces restrictions on advanced AI chips, pushing domestic innovation in alternative architectures like optical interconnects.

Domestic Push: Peking University's paper explicitly cites co-packaged optics and silicon photonic transceivers — the exact technology Nvidia Israel commercializes.

🇮🇱 Nvidia Israel's Position

Yokneam R&D Hub: Nvidia's primary center for networking chips — the glue connecting AI processors into unified systems.

Israeli Ecosystem: Tower Semiconductor (Migdal HaEmek) supplies 1.6T silicon photonics. Ayar Labs, Teramount, and other Israeli startups provide critical components.

Strategic Dependency: Without Mellanox's networking, Nvidia's GPU clusters cannot function at scale — making Israel's R&D essential to global AI infrastructure.

⚡ The Paradox

Constrain & Replicate: China is trying to limit Nvidia's networking dominance through antitrust action while simultaneously trying to replicate it domestically through academic research.

Technology Flow: The Peking University paper validates the same architectural direction Nvidia Israel has been productizing since 2020.

Supply Chain Risk: CPO adoption projected at ~35% of AI DC optical modules by 2030 — the race is on.

Hyperscaler CAPEX: $630B+ expected spend on AI infrastructure in 2026 — much of it on processors and the systems that connect them.

Conclusion

Proof of concept meets production at scale

🇨🇳 Peking University

A proof of concept that validates the same architectural direction Nvidia Israel has been productizing. The 100× speedup is impressive but measured on a single 5-layer CNN for image denoising — generalization to LLM-scale workloads is unproven.

🇮🇱 Nvidia Israel / Mellanox

Production at scale: Shipping CPO switches at 409.6 Tb/s across million-GPU clusters, generating $11B/quarter. The optical technology is integrated into a full stack rather than demonstrated as a prototype.

The Shared Future

Both sides prove the same fundamental truth: AI performance can no longer scale by adding more GPUs.
Light must replace copper — the question is whether it happens inside the compute pipeline (Peking) or at the data-center fabric (Nvidia Israel).
Both paths will likely converge as optical interconnects penetrate deeper into the chip stack.

Prepared by Daniel LiezrowiceLinkedIn | Engineering Software Lab — AI SDLC Consultants | www.eswlab.com
Sources: National Science Review, Interesting Engineering, Nvidia, Calcalist Tech, IDTechEx, Wikipedia
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